IEEE Embedded Systems Letters

Device Access Abstractions for Resilient Information Architecture Platform for Smart Grid

HotSniper: Sniper-Based Toolchain for Many-Core Thermal Simulations in Open Systems

Post-Quantum Enabled Cyber Physical Systems

Dynamic Scheduling of Real-Time Tasks in Heterogeneous Multicore Systems

Automatic Energy-Minimized HW/SW Partitioning for FPGA-Accelerated MPSoCs

RoadNet: An 80-mW Hardware Accelerator for Road Detection

i-DPs CGRA: An Interleaved-Datapaths Reconfigurable Accelerator for Embedded Bio-Signal Processing

Contract-Based Methodology for Developing Resilient Cyber-Infrastructure in the Industry 4.0 Era

Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators

Rapid Integration of CPS Security and Safety

Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii–Keren Codes

Making Sensor Node Virtual Machines Work for Real-World Applications

Iterative Histogram-Based Performance Analysis of Embedded Systems

Performance, Security Tradeoffs in Secure Control

Feasibility Interval for Fixed-Priority Scheduling of Mixed-Criticality Periodic Tasks With Offsets

Estimation of Maximum Speed-Up in Multicore-Based Mobile Devices

Revisiting AES SBox Composite Field Implementations for FPGAs

Data Reduction Using Integrated Adaptive Filters for Energy-Efficient in the Clusters of Wireless Sensor Networks

Combining Automated Measurement-Based Cost Modeling With Static Worst-Case Execution-Time and Energy-Consumption Analyses

Design of an Embedded Communication System for Underwater Asynchronous Localization

A Novel Processor Architecture With a Hardware Microkernel to Improve the Performance of Task-Based Systems

Uniform Minimal First: Latency Reduction in Throughput-Optimal Oblivious Routing for Mesh-Based Networks-on-Chip

A Hardware Compensation Mechanism for Embedded Energy Harvesting Emulation

Memristor-Based Hybrid Fault Tolerant Structure With Concurrent Reconfigurability

Parallel Enumeration of Custom Instructions Based on Multidepth Graph Partitioning

Running Median Algorithm and Implementation for Integer Streaming Applications

OpenNoC: An Open-Source NoC Infrastructure for FPGA-Based Hardware Acceleration