IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
ISSN:0278-0070

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS

IEEE T COMPUT AID D
学科领域:计算机科学
是否预警:不在预警名单内
是否OA:
录用周期:一般,3-8周
新锐分区:计算机科学3区
年发文量:388
影响因子:2.9
JCR分区:Q2

基本信息

本汇刊的目的是发表由模拟、数字、混合信号、光学或微波元件组成的集成电路和系统的计算机辅助设计领域的个人感兴趣的论文。这些辅助工具包括用于系统级、物理和逻辑设计的方法、模型、算法和人机接口,包括:规划、合成、划分、建模、仿真、布局、验证、测试、硬件-软件协同设计以及集成电路和所有复杂系统设计的文档编制。用于评估和设计集成电路和系统的诸如性能、功率、可靠性、可测试性和安全性的度量的设计工具和技术是关注的焦点。
0278-0070SCIE/Scopus收录
2.9
2.7
2026年3月发布
点击查看历史分区趋势    >
大类学科小类学科Top期刊综述期刊
计算机科学3区
COMPUTER SCIENCE, HARDWARE & ARCHITECTURE 计算机:硬件
3区
COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS 计算机:跨学科应用
3区
ENGINEERING, ELECTRICAL & ELECTRONIC 工程:电子与电气
3区
N/A
WOS期刊SCI分区  2024-2025最新升级版
按JIF指标学科分区收集子录JIF分区JIF排名百分位
学科:COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
SCIE
Q2
24/60
学科:COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS
SCIE
Q3
90/177
学科:ENGINEERING, ELECTRICAL & ELECTRONIC
SCIE
Q2
162/368
按JCR指标学科分区收集子录JCR分区JCR排名百分位
学科:COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
SCIE
Q2
26/60
学科:COMPUTER SCIENCE, INTERDISCIPLINARY APPLICATIONS
SCIE
Q2
80/177
学科:ENGINEERING, ELECTRICAL & ELECTRONIC
SCIE
Q2
144/368
107
388
22%容易一般,3-8周-工程技术-工程:电子与电气
10.3%
时间预警情况
2026年03月发布的新锐学术版不在预警名单中
2025年03月发布的2025版不在预警名单中
2024年02月发布的2024版不在预警名单中
2023年01月发布的2023版不在预警名单中
2021年12月发布的2021版不在预警名单中
2020年12月发布的2020版不在预警名单中
99.74%4.44%0.23%
CiteScore:5.50
SJR:0.725
SNIP:1.339
学科类别分区排名百分位
大类:Computer Science
小类:Computer Graphics and Computer-Aided Design
Q1
32 / 127
大类:Computer Science
小类:Electrical and Electronic Engineering
Q2
255 / 970
大类:Computer Science
小类:Software
Q2
170 / 490

期刊高被引文献

TIME: A Training-in-Memory Architecture for RRAM-Based Deep Neural Networks
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2824304
Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2834394
Data Efficient Lithography Modeling With Transfer Learning and Active Data Selection
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2864251
Fault-Tolerant Training Enabled by On-Line Fault Detection for RRAM-Based Neural Computing Systems
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2855145
Error-Oblivious Sample Preparation With Digital Microfluidic Lab-on-Chip
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2864263
Security Assessment of Micro-Electrode-Dot-Array Biochips
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2864249
A Versatile Pulse Control Method to Generate Arbitrary Multidirection Multibutterfly Chaotic Attractors
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2855121
IC Protection Against JTAG-Based Attacks
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2802866
Design and Analysis of a Neural Network Inference Engine Based on Adaptive Weight Compression
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2801228
Design Space Exploration of Neural Network Activation Function Circuits
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2871198
New 3-D CMOS Fabric With Stacked Horizontal Nanowires
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2848588
Data-Flow Graph Mapping Optimization for CGRA With Deep Reinforcement Learning
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878183
A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2818707
On-Chip Analog Trojan Detection Framework for Microprocessor Trustworthiness
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2864246
Single-Layer GNR Routing for Minimization of Bending Delay
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878164
A Thermal-Aware Physical Space Reallocation for Open-Channel SSD With 3-D Flash Memory
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2821442
Formal Probabilistic Analysis of Low Latency Approximate Adders
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2803622
A Pulse Shrinking-Based Test Solution for Prebond Through Silicon via in 3-D ICs
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2821559
DtCraft: A High-Performance Distributed Execution Engine at Scale
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2834422
Co-Optimizing Storage Space Utilization and Performance for Key-Value Solid State Drives
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2801244
Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2834424
Collaborative Power Management Through Knowledge Sharing Among Multiple Devices
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2837131
Synthesis of Reconfigurable Flow-Based Biochips for Scalable Single-Cell Screening
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878159
Built-In Test for Hidden Delay Faults
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2864255
Alleviating Hot Data Write Back Effect for Shingled Magnetic Recording Storage Systems
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878190
Improving Flash Memory Performance and Reliability for Smartphones With I/O Deduplication
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2834395
Bug Prediction of SystemC Models Using Machine Learning
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878193
RegionSeeker: Automatically Identifying and Selecting Accelerators From Application Source Code
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2818689
Enhanced Optimal Multi-Row Detailed Placement for Neighbor Diffusion Effect Mitigation in Sub-10 nm VLSI
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2859266
Optimal Performance-Aware Cooling on Enterprise Servers
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2855122
Automatic Retiming of Two-Phase Latch-Based Resilient Circuits
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2846631
Calculated Risks: Quantifying Timing Error Probability With Extended Static Timing Analysis
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2821563
Scalable Construction of Clock Trees With Useful Skew and High Timing Quality
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2834437
Obfuscated Built-In Self-Authentication With Secure and Efficient Wire-Lifting
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2877012
Game Theoretic Feedback Control for Reliability Enhancement of EtherCAT-Based Networked Systems
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2859241
An Efficient BIRA Utilizing Characteristics of Spare Pivot Faults
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2818725
A Binary-Feature-Based Object Recognition Accelerator With 22 M-Vector/s Throughput and 0.68 G-Vector/J Energy-Efficiency for Full-HD Resolution
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2846634
A Sufficient Response Time Analysis Considering Angular Phases Between Rate-Dependent Tasks
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878163
Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2855131
Reliability Analysis of Mixture Preparation Using Digital Microfluidic Biochips
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2819081
Mitigating and Tolerating Read Disturbance in STT-MRAM-Based Main Memory via Device and Architecture Innovations
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878166
Enhanced Phase-Driven $Q$ -Learning-Based DRM for Multicore Processors
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2877014
Multi-Pair Active Shielding for Security IC Protection
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878175
Table-Based Model of a Dual-Gate Transistor for Statistical Circuit Simulation
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2852756
Fault Awareness for Memory BIST Architecture Shaped by Multidimensional Prediction Mechanism
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2818688
Verification at RTL Using Separation of Design Concerns
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2848589
Comprehensive Side-Channel Power Analysis of XTS-AES
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2878171
On-Chip Diagnosis of Generalized Delay Failures Using Compact Fault Dictionaries
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2803621
A Cross-Layer Framework for Temporal Power and Supply Noise Prediction
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2871820
DSA-Compliant Routing for 2-D Patterns Using Block Copolymer Lithography
来源期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsDOI:10.1109/TCAD.2018.2812122

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