IEEE JOURNAL OF SOLID-STATE CIRCUITS

An Always-On 3.8 $\\mu$ J/86% CIFAR-10 Mixed-Signal Binary CNN Processor With All Memory on Chip in 28-nm CMOS

A 28-GHz Flip-Chip Packaged Chireix Transmitter With On-Antenna Outphasing Active Load Modulation

A Compact 10-b SAR ADC With Unit-Length Capacitors and a Passive FIR Filter

A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting

Logic Process Compatible 40-nm 16-Mb, Embedded Perpendicular-MRAM With Hybrid-Resistance Reference, Sub- $\\mu$ A Sensing Resolution, and 17.5-nS Read Access Time

A 60-GHz 3.0-Gb/s Spectrum Efficient BPOOK Transceiver for Low-Power Short-Range Wireless in 65-nm CMOS

A 115–135-GHz 8PSK Receiver Using Multi-Phase RF-Correlation-Based Direct-Demodulation Method

A Noise-Shaped VCO-Based Nonuniform Sampling ADC With Phase-Domain Level Crossing

A 0.8-V 82.9- $\\mu$ W In-Ear BCI Controller IC With 8.8 PEF EEG Instrumentation Amplifier and Wireless BAN Transceiver

Design of Single-Topology Continuously Scalable-Conversion-Ratio Switched- Capacitor DC–DC Converters

A Super-Resolution Mixed-Signal Doherty Power Amplifier for Simultaneous Linearity and Efficiency Enhancement

Design of Crystal-Oscillator Frequency Quadrupler for Low-Jitter Clock Multipliers

An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications

Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From −22 to 4 dBm With 99.8% Peak MPPT Power Efficiency

Analysis and Design of a Full-Duplex Two-Element MIMO Circulator-Receiver With High TX Power Handling Exploiting MIMO RF and Shared-Delay Baseband Self-Interference Cancellation

A 75.3-dB SNDR 24-MS/s Ring Amplifier-Based Pipelined ADC Using Averaging Correlated Level Shifting and Reference Swapping for Reducing Errors From Finite Opamp Gain and Capacitor Mismatch

Inverter-Based Subthreshold Amplifier Techniques and Their Application in 0.3-V $\\Delta\\Sigma$ -Modulators

ULPAC: A Miniaturized Ultralow-Power Atomic Clock

Design and Analysis of a DCO-Based Phase-Tracking RF Receiver for IoT Applications

A General Theory of Injection Locking and Pulling in Electrical Oscillators—Part II: Amplitude Modulation in $LC$ Oscillators, Transient Behavior, and Frequency Division

A DC-to-108-GHz CMOS SOI Distributed Power Amplifier and Modulator Driver Leveraging Multi-Drive Complementary Stacked Cells

A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging

A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking

Study and Design of a Fast Start-Up Crystal Oscillator Using Precise Dithered Injection and Active Inductance

A Calibration-Free Time-Interleaved Fourth-Order Noise-Shaping SAR ADC

A 0.34-THz Wideband Wide-Angle 2-D Steering Phased Array in 0.13- $\\mu$ m SiGe BiCMOS

An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators

A Data-Compressive 1.5/2.75-bit Log-Gradient QVGA Image Sensor With Multi-Scale Readout for Always-On Object Detection

A 28-nm 320-Kb TCAM Macro Using Split-Controlled Single-Load 14T Cell and Triple-Margin Voltage Sense Amplifier

A Watt-Level Phase-Interleaved Multi-Subharmonic Switching Digital Power Amplifier

A Self-Oscillating Boosting Amplifier With Adaptive Soft Switching Control for Piezoelectric Transducers

A Hybrid Structure Dual-Path Step-Down Converter With 96.2% Peak Efficiency Using 250-m $\\Omega$ Large-DCR Inductor

A Differential Optical Receiver With Monolithic Split-Microring Photodetector

EMI-Regulated GaN-Based Switching Power Converter With Markov Continuous Random Spread-Spectrum Modulation and One-Cycle on-Time Rebalancing

A 15-Gb/s Sub-Baud-Rate Digital CDR

A 600-MS/s DAC With Over 87-dB SFDR and 77-dB Peak SNDR Enabled by Adaptive Cancellation of Static and Dynamic Mismatch Error

A 12.6 mW, 573–2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals

A 1.06- $\\mu$ W Smart ECG Processor in 65-nm CMOS for Real-Time Biometric Authentication and Personal Cardiac Monitoring

A 52% Peak Efficiency > 1-W Isolated Power Transfer System Using Fully Integrated Transformer With Magnetic Core

A 230–260-GHz Wideband and High-Gain Amplifier in 65-nm CMOS Based on Dual-Peak $G_{{\\mathrm{max}}}$ -Core

An Electronic Dispersion Compensation Transceiver for 10- and 28-Gb/s Directly Modulated Lasers-Based Optical Links

A 0.016 mm2 0.26- $\\mu$ W/MHz 60–240-MHz Digital PLL With Delay-Modulating Clock Buffer in 65 nm CMOS

Expression of Fas Receptor and Fas Ligand in Eczematous Dermatitis

3-D NAND Flash Value-Aware SSD: Error-Tolerant SSD Without ECCs for Image Recognition

An 8T SRAM With On-Chip Dynamic Reliability Management and Two-Phase Write Operation in 28-nm FDSOI

A 135-mW 1.70TOPS Sparse Video Sequence Inference SoC for Action Classification

An Energy Measurement Frontend With Integrated Adaptive Background Accuracy Monitoring of the Full System Including the Current and Voltage Sensors